It appears that most analysts think that EDA maybe hot again sometime in late 2007- 2008, when new re-tooling must take place to maintain competitiveness.

The big problem is still design starts—which are still falling due to the cost of ASIC’s and advances made in ASSP “multiprocessors”, and FPGA’s.

EDA tools, offering new functionality, may cost more to allow companies to remain profitable because of low volume. For example, NEC announced it's C-2-RTL tool for $300K a piece!