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Calls for 'restrictive design rules' at 32-nm |
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Written by SVTechie
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Thursday, 13 July 2006 |
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The semiconductor could see widespread adoption of so-called "restrictive design
rules" (RDR) as a way to ensure acceptable yield and return on investment at the
32-nanometer node, according to Gary Smith, a managing vice president and chief
EDA analyst at Gartner Inc.
Similar in concept to FPGAs, the theory behind RDR, according to
Smith, is that a regular array is significantly easier to manufacture than a
semi-random array of cells.
Read @ Gartner's Smith calls for 'restrictive design rules'
at 32-nm
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Last Updated ( Thursday, 13 July 2006 )
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