|
Intel CTO: multicore performance standards needed |
|
|
|
|
Written by SVTechie
|
|
Friday, 25 August 2006 |
|
In a keynote presentation at this week's IEEE Hot Chips Conference at
Stanford University, Rattner noted that designers must deal with complex memory
hierarchies and sophisticated on-chip interconnect fabrics to ensure the cores
are not data starved. At the same time, the processor must provide explicit
thread support and deal with time-critical functions, as well as include
fixed-function accelerators.
For a four-core system, the Gaston algorithm drivers provide five times the
throughput of the gSpan algorithm, but slows as the number of cores increases
beyond four. The gSpan algorithm is more scalable and provides higher
performance than the Gaston algorithm as the number of cores increases.
But algorithms that can leverage the cores and hardware threading are only
the starting point, noted Ratter. Improving the cache architecture of the system
can also boost throughput by a factor two, he added. Tuning the instruction set
enables designers to further improve throughput.
Read @ Intel CTO: multicore performance standards needed
Amdahl observed that there is no significant gain beyond 10 parallel cores. (And typically 4 cores). Though Gustafson did show that gain is possible beyond 10x (Actual 250x), for general purpose computing Amdahl's observation still holds true!
|
|
Last Updated ( Friday, 25 August 2006 )
|
SVTechie Blog