Location of Most Significant ‘ON’ Bit


Performance Summary for each solution is presented below.

Implementation   RTL Size   Simplicity   LP Area   LP Timing   HP Area   HP Timing
Algorithm 1         32          8/10        1184       7.31       3500       1.19
Algorithm 2         90          6/10        1300       2.74       1862       0.85

As it is evident from the results, algorithm selection criteria depends on requirements. For low performance implementation 1 is clear winner & for high performance, implementation 2 is clear winner

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